Add Jtag Port

From NAS-Central Buffalo - The Linkstation Wiki

Revision as of 20:18, 9 March 2007 (view source) Dtaylor (Talk) m ← Older edit		Revision as of 01:09, 23 June 2007 (view source) DquK4p (Talk) m Newer edit →
Line 17:		Line 17:
	|TDO		|TDO
	|1		|1
-	|→	+	|
-	|2	+
-	|QACK	+
-	|- bgcolor=#CCCCCC	+
-		+
-	|TDI	+
-	|3	+
-	|→	+
-	|4	+
-	|TRST (Neg)	+
-	|- bgcolor=#CCCCCC	+
-	|HALTED	+
-	|5	+
-	|→	+
-	|6	+
-	|Vcc Target	+
-	|- bgcolor=#CCCCCC	+
-	|TCK	+
-	|7	+
-	|→	+
-	|8	+
-	|CKSI	+
-	|- bgcolor=#CCCCCC	+
-	|TMS	+
-	|9	+
-	|→	+
-	|10	+
-	|??	+
-	|- bgcolor=#CCCCCC	+
-	|SRST (Neg)	+
-	|11	+
-	|→	+
-	|12	+
-	|Gnd (??)	+
-	|- bgcolor=#CCCCCC	+
-	|HRST (Neg)	+
-	|13	+
-	|→	+
-	|14	+
-	|NC (key)	+
-	|- bgcolor=#CCCCCC	+
-	|CKSO	+
-	|15	+
-	|→	+
-	|16	+
-	|Gnd	+
-	|}	+
-		+
-	Pin Name      Description	+
-	1  TDO        JTAG Test Data Out	+
-	2  QACK      Not Needed	+
-	3  TDI        JTAG Test Data In	+
-	4  TRST      JTAG Test Reset	+
-	5  HALTED    Not Needed	+
-	6  Vcc Target 1.8 – 5.0V:	+
-	This is the target reference voltage. It indicates that the target has power and it is also used	+
-	to create the logic-level reference for the input comparators. It also controls the output logic	+
-	levels to the target. It is normally fed from Vdd I/O on the target board.	+
-	3.0 – 5.0V:	+
-	This input is used to detect if the target is powered up. If there is a current	+
-	limiting resistor between this pin and the target Vdd, it should be 100 Ohm or less.	+
-	7  TCK        JTAG Test Clock	+
-	8  CKSI      Not Connected ??	+
-	9  TMS        JTAG Test Mode Select	+
-	10  <reseved>	+
-	11  SRESET    Soft-Reset	+
-	12  GROUND    System Ground	+
-	13  HRESET    Hard-Reset	+
-	14  <reseved>	+
-	15  CKSO      Not Connected on the 8421	+
-	16  GROUND    System Ground	+
-		+
-	== On-Chip Debug (OCD) connector ==	+
-	The internal OCD port uses an electrical standard known as JTAG/COP. The signals have to be buffered to protect the hardware from damage and we use a JTAG wiggler to do this.	+
-		+
-	Those with some electrical experience could build their own circuit, but most will opt for ordering one.	+
-		+
-	=== Schematics and Software to build your own ===	+
-	* [[Building a JTAG Interface]]	+
-	* http://hri.sourceforge.net/tools/	+
-		+
-	=== Buy one ===	+
-	* Commercial - The [http://www.macraigor.com/wiggler.htm Macraigor Wiggler] seems to be the cheapest at $150.	+
-	* Hobby - Could the 20-pin [http://www.olimex.com/dev/arm-jtag.html Olimex ARM-JTAG] be modified to work with Kuro-Box?  $20.	+
-	* A quick search on ebay will find many buffered JTAG cables for less than $20.	+
-		+
-	[[Category:Hardware]]	+
-	[[Category:HowTo]]	+
-	[[Category:JTAG]]	+

---

Revision as of 01:09, 23 June 2007

This document is a work in progress. It explains how to fit the internal on-chip debug (OCD) port on a Linkstation, Kuro-Box or Kuro-Box/HG to a PC interface.

Adding the JTAG Port

Locate the pads

The pads are labelled CN5 and can be seen just above the serial level converter (where the yellow, orange, and red wires start to split) in this photo

Connector Pin-outs

In order to use this port, you should bridge R67.

Baulab posted cable schematics, some pictures of the assembled jtag cable, and software needed.

According to http://www.abatron.ch/Files/ManAccessCOP-2000C.pdf and http://www.freescale.com/files/soft_dev_tools/doc/user_guide/CWH-UTP-UG.pdf the following pins are used for a PPC COP/JTAG interface:

TDO

1