Difference between revisions of "Add Jtag Port"
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===Locate the pads===
===Locate the pads===
The pads are labeled CN5 and can be seen just above the serial level converter (where the yellow, orange, and red wires start to split) in [http://
The pads are labeled CN5 and can be seen just above the serial level converter (where the yellow, orange, and red wires start to split) in [http://..///IMG_1392.jpg this photo]
Latest revision as of 20:47, 31 March 2010
This document is a work in progress. It explains how to fit the internal on-chip debug (OCD) port on a Linkstation, Kuro-Box or Kuro-Box/HG to a PC interface.
Adding the JTAG Port
Locate the pads
The pads are labeled CN5 and can be seen just above the serial level converter (where the yellow, orange, and red wires start to split) in this photo
In order to use this port, you should bridge R67.
According to http://www.abatron.ch/Files/ManAccessCOP-2000C.pdf and http://www.freescale.com/files/soft_dev_tools/doc/user_guide/CWH-UTP-UG.pdf the following pins are used for a PPC COP/JTAG interface: 
|SRST (Neg)||11||→||12||Gnd (??)|
|HRST (Neg)||13||→||14||NC (key)|
Pin Name Description 1 TDO JTAG Test Data Out 2 QACK Not Needed 3 TDI JTAG Test Data In 4 TRST JTAG Test Reset 5 HALTED Not Needed 6 Vcc Target 1.8 – 5.0V: This is the target reference voltage. It indicates that the target has power and it is also used to create the logic-level reference for the input comparators. It also controls the output logic levels to the target. It is normally fed from Vdd I/O on the target board. 3.0 – 5.0V: This input is used to detect if the target is powered up. If there is a current limiting resistor between this pin and the target Vdd, it should be 100 Ohm or less. 7 TCK JTAG Test Clock 8 CKSI Not Connected ?? 9 TMS JTAG Test Mode Select 10 <reseved> 11 SRESET Soft-Reset 12 GROUND System Ground 13 HRESET Hard-Reset 14 <reseved> (key, which means this pin is often removed) 15 CKSO Not Connected on the 8421 16 GROUND System Ground
On-Chip Debug (OCD) connector
Technically, JTAG refers only to the 5 pins with JTAG in the description above (wikipedia). There is a 14-pin JTAG interface, commonly referred to as the TI standard. There is also a 20-pin JTAG interface, commonly referred to as the ARM standard. For connecting to your PC, there are two common options: parallel port and USB. Some software packages do not support USB cables. 
The OCD port on the Linkstation uses an electrical standard known as JTAG/COP. The 16-pin COP header for Freescale devices is slightly different from the TI/ARM standards. Although this is signal-level compatible with the TI/ARM standards, unfortunately the pins are in a different order on the Linkstation. Therefore, you will need to build your own cable, or use some wires to manually connect the proper pins. The signals have to be buffered to protect the hardware from damage and we use a JTAG adapter (such as the Wiggler) to do this. Those with some electronics experience could build their own circuit, but there are also several inexpensive vendors.
JTAG Interface Cable
Schematics and Software to build your own
- Building a JTAG Interface How to build your own parallel port-JTAG interface cable.
Several inexpensive options are listed below. 
- Olimex (look for a local distributor to save on shipping)
- A quick search on ebay will find many buffered JTAG cables for less than $20.
- This also agrees with the recommended JTAG implementation as documented in Freescale MPC8241 Info, which is the CPU used for the Linkstation HG. See pages 45-46. Note that there is no guarantee that Buffalo followed this recommendation, but it appears that they did.
- Most of the USB implementations appear to use a version of the FT2232 chip from FTDI, so they should all be somewhat compatible.
- There are more expensive options. I didn't include any options which are more expensive than the Linkstation. Please also pay attention to the included software, (make sure the software supports your target board)