Difference between revisions of "Category:JTAG"
|Line 8:||Line 8:|
Revision as of 17:48, 18 July 2007
A JTAG interface is a special four/five-pin interface added to a chip, designed so that multiple chips on a board can have their JTAG lines daisy-chained together, and a test probe need only connect to a single "JTAG port" to have access to all chips on a circuit board. The connector pins are
- TDI (Test Data In)
- TDO (Test Data Out)
- TCK (Test Clock)
- TMS (Test Mode Select)
- TRST (Test ReSeT) optional.
Pages in category "JTAG"
The following 15 pages are in this category, out of 15 total.
Media in category "JTAG"
This category contains only the following file.