Category:LS2

HDHLAN MIPSel (LS2)

are can be found on the main board:

• IDT 79RC32434-400BC Integrated Communications Processor, containing
  • 32-bit @ 400MHz MIPSel CPU core (el -> le -> little endian) with MIPS32 instructions set architecture. Based on the MIPS 4Kc core.
  • 10/100Mb Ethernet channel {:MII:Media Independent Interface}/{:RMII:Reduced Media Independent Interface} interface controller
  • Serial UART, 16550 compatible
  • DDR memory controller, can handle up to 256MB
  • general purpose memory controller
  • PCI controller
  • DMA controller
  • I'^2^'C bus
  • general purpose I/O connectors
  • JTAG interface (hardware-supported debugging)
  • Watchdog timer
  • No FPU (floating point is done via software emulation)
• 8201CP 'PHYceiver' - Physical Ethernet tranceiver, connected to the ICP's Ethernet channel
• RAM - 64MB Micron MT 46V32MI6-SBC SDRAM
• Flash ROM - 4MB Macronix MX29LV320T.
• IT8211 PCI IDE disk controller. The stock kernel driver reports an IT8212 (an IDE RAID 0/1/0+1 controller). However, there is indeed only a IT8211 on the board.
• USB - 2 type A connectors (rear - /dev/usb/lp0, front - /dev/usb/lp1) -

Look Here

Information/MIPSelOverview