Hardware Hacks for the LS Pro

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All input is welcome. Please do not edit this page directly as I do not want any information to get past me without my knowledge as it could be detrimental to the LS Pro on which I'm experimenting. Please post any comments to the forum thread or the talk page.


Kurobrick.png
WARNING!

There is a possibility that you could brick your NAS with these instructions. Please make sure that you read the entire page carefully. THIS PAGE IS A WORK IN PROGRESS AND IS EXPERIMENTAL IN NATURE. AS SUCH, IS NOT FULLY TESTED AND IMPLEMENTED. THESE MODIFICATIONS MAY CAUSE DAMAGE TO THE LS Pro HARDWARE. IMPLEMENTING THE CHANGES DESCRIBED HERE MAY DAMAGE YOUR LS Pro BEYOND REPAIR, EVEN WITH JTAG ACCESS.



This is an account of the attempts of Tampakuro (aka Kuroguy) to open the LS Pro hardware to more development. I'll be concentrating mainly on the flash memory as well as adding an eSATA port.

Contents

Flash modifications

There are two obvious routes to reprogramming the flash memory:

The Dual flash Method

The JTAG Access Method

Adding an additional hard drive

Adding a second SATA drive to your Linkstation Pro is as simple as installing a 0.01 uF surface mount capacitor at C279, C280, C281, and C282 and then installing the proper Molex connector at CN8. I used a Molex part number xxxxx and held it down with a piece of 18 gage wire soldered over it like a strap. I've atached a photo:

CN8.jpg

To test this I plugged the hard disk into the new sata port (I didn't have a spare SATA drive). The bootloader would not boot directly to the SATA drive plugged into CN8 so I bbooted the device using TFTP to retrieve the kernel and initrd. Once the device had the kernel and initrd loaded it pivoted to the root filesystem on the SATA drive even though it was attached to the secondary SATA port. I have attached a portion og the DMESG showing the device was recognized:

LS_Pro ~ # dmesg       
Linux version 2.6.12.6-arm1 (root@Desktop) (gcc version 3.4.4 (release) (CodeSou
rcery ARM 2005q3-2)) #76 Sat Nov 25 14:48:39 CST 2006
CPU: ARM926EJ-Sid(wb) [41069260] revision 0 (ARMv5TEJ)
CPU0: D VIVT write-back cache
CPU0: I cache: 32768 bytes, associativity 1, 32 byte lines, 1024 sets
CPU0: D cache: 32768 bytes, associativity 1, 32 byte lines, 1024 sets
Machine: MV-88fxx81
Using UBoot passing parameters structure
Sys Clk = 200000000, Tclk = 166664740

- Warning - This LSP release was tested only with U-Boot release 1.7.3  

Memory policy: ECC disabled, Data cache writeback
On node 0 totalpages: 32768
  DMA zone: 32768 pages, LIFO batch:15
  Normal zone: 0 pages, LIFO batch:1
  HighMem zone: 0 pages, LIFO batch:1
Built 1 zonelists
Kernel command line: console=ttyS0,115200 root=/dev/sda2 rw initrd=0x00800040,15
M panic=5 BOOTVER=1.01
PID hash table entries: 1024 (order: 10, 16384 bytes)
Console: colour dummy device 80x30
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 128MB 0MB 0MB 0MB = 128MB total
Memory: 110464KB available (3104K code, 517K data, 112K init)
Calibrating delay loop... 266.24 BogoMIPS (lpj=1331200)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
checking if image is initramfs...it isn't (no cpio magic); looks like an initrd
Freeing initrd memory: 15360K
NET: Registered protocol family 16
FLASH boardId = 12
Flash bankwidth 1, base ff800000, size 400000
BUFFALO LS_GL FLASH size 4096[KB] 

 Marvell Development Board (LSP Version 1.7.8_NAS)-- BUFFALO_BOARD_LS_GL  

 Detected Tclk 166664740 and SysClk 200000000 
Marvell USB EHCI Host controller #0: c1702bc0
Marvell USB EHCI Host controller #1: c1702980
pexBarOverlapDetect: winNum 2 overlap current 0
mvPexInit:Warning :Bar 2 size is illigal
it will be disabled
please check Pex and CPU windows configuration
PCI: bus0: Fast back to back transfers enabled
PCI: bus1: Fast back to back transfers enabled
SCSI subsystem initialized
usbcore: registered new driver usbfs
usbcore: registered new driver hub
use IDMA acceleration in copy to/from user buffers. used channels 2 and 3 
Done. 
cesadev_init(c0011304)
mvCesaInit: sessions=640, queue=32, pSram=f0000000
Fast Floating Point Emulator V0.9 (c) Peter Teichmann.
VFS: Disk quotas dquot_6.5.1
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
SGI XFS with no debug enabled
Initializing Cryptographic API
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
ttyS0 at MMIO 0x0 (irq = 3) is a 16550A
ttyS1 at MMIO 0x0 (irq = 4) is a 16550A
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
RAMDISK driver initialized: 3 RAM disks of 16384K size 1024 blocksize
loop: loaded (max 8 devices)
Marvell Gigabit Ethernet Driver 'egiga':
  o Ethernet descriptors in DRAM
  o DRAM SW cache-coherency
  o Checksum offload enabled
  o Loading network interface ** egiga_init_module (0)
'eth0' 
Intergrated Sata device found
scsi0 : Marvell SCSI to SATA adapter
scsi1 : Marvell SCSI to SATA adapter
  Vendor: WDC       Model: WD2500JS-00NCB1   Rev: 10.0
  Type:   Direct-Access                      ANSI SCSI revision: 03
SCSI device sda: 488397168 512-byte hdwr sectors (250059 MB)
SCSI device sda: drive cache: write back
SCSI device sda: 488397168 512-byte hdwr sectors (250059 MB)
SCSI device sda: drive cache: write back
 sda: sda1 sda2 sda3 sda4
Attached scsi disk sda at scsi0, channel 0, id 0, lun 0
Attached scsi generic sg0 at scsi0, channel 0, id 0, lun 0,  type 0
physmap flash device: 400000 at ff800000
CFI: Found no phys_mapped_flash device at location zero....