Difference between revisions of "JTAG instructions and hints"

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===LS2===
 
===LS2===
 
==Arm-based boxes==
 
==Arm-based boxes==
Tampakuro/kuroguy discovered the layout of the JTAG Port on LS Pro v1 and an early KuroPro by tracing the wiring.  The account of his work and early efforts is here : [http://forum.nas-central.org/viewtopic.php?f=39&t=3001 JTAG for the LS Pro and LS Live].  He found that the v1 had a non-standard pinout.  The v2 LS Live has a [http://hri.sourceforge.net/tools/jtag_faq_org.html#_Toc63218717 standard ARM 20 pin layout].  mdfirefighter and others discovered that Dominic Rath's OpenOCD software was the key to opening the LS Pro to JTAG - this is detailed in the same thread linked to above.
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===LS Pro and LS Live===
===LS Pro/LS Live (arm9)===
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See the article at [http://buffalo.nas-central.org/index.php/JTAG_%26_OpenOCD_for_LS-Pro JTAG & OpenOCD for the LS-Pro] for complete details and instructions.
====Flash structure====
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For the LSProV2, here is the output of flinfo while in u-boot:
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Marvell>> flinfo                                                               
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Bank # 1: SST SST39VF020 (2 Mbit)                                             
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Size: 256 kB,Bus Width: 1, device Width: 1.                                   
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Flash base: 0xfffc0000,Number of Sectors: 64 Type: REGULAR.                   
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  Sector Start Addresses:                                                     
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    00000000 (RO) 00001000 (RO) 00002000 (RO) 00003000 (RO) 00004000 (RO)     
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    00005000 (RO) 00006000 (RO) 00007000 (RO) 00008000 (RO) 00009000 (RO)     
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    0000a000 (RO) 0000b000 (RO) 0000c000 (RO) 0000d000 (RO) 0000e000 (RO)     
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    0000f000 (RO) 00010000 (RO) 00011000 (RO) 00012000 (RO) 00013000 (RO)     
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    00014000 (RO) 00015000 (RO) 00016000 (RO) 00017000 (RO) 00018000 (RO)     
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    00019000 (RO) 0001a000 (RO) 0001b000 (RO) 0001c000 (RO) 0001d000 (RO)     
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    0001e000 (RO) 0001f000 (RO) 00020000 (RO) 00021000 (RO) 00022000 (RO)     
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    00023000 (RO) 00024000 (RO) 00025000 (RO) 00026000 (RO) 00027000 (RO)     
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    00028000 (RO) 00029000 (RO) 0002a000 (RO) 0002b000 (RO) 0002c000 (RO)     
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    0002d000 (RO) 0002e000 (RO) 0002f000 (RO) 00030000 (RO) 00031000 (RO)     
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    00032000 (RO) 00033000 (RO) 00034000 (RO) 00035000 (RO) 00036000 (RO)     
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    00037000 (RO) 00038000 (RO) 00039000 (RO) 0003a000 (RO) 0003b000 (RO)     
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    0003c000 (RO) 0003d000 (RO) 0003e000 (RO) 0003f000
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====Background and Required Hardware Software====
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CAUTION : USE AT YOUR OWN RISK.  IT IS POSSIBLE TO BRICK ONE'S BOX WITH THESE METHODS. UNBRICKING IS NOT GUARANTEED.
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These directions have been tested and checked on a LSProV2. The OCD software we use is [http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger OpenOCD], created by Dominic Rath.
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*[http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger OpenOCD].  You should probably work with the version that most of us here have used - [http://downloads.nas-central.org/ALL_LS_KB_ARM9/openocd-lspro.tgz download it from here].
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*JTAG adapter like the Olimex ARM-USB-TINY (tested) or a Wiggler  (Wigglers and other paraport adapters seem slower than USB).
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*an x86 desktop/laptop running Linux (tested w/ Ubuntu 7.10)
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*JTAG headers already attached to your ARM-based LinkStation's board
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====Setting Up OpenOCD====
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*Compiling- See [http://openfacts.berlios.de/index-en.phtml?title=Building_OpenOCD Building OpenOCD] for full details.  Some hints are listed below for using it with the Olimex JTAG USB TINY adapter, which is ftdi-based. 
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**Install libftdi (http://www.intra2net.com/opensource/ftdi/) or libftd2xx (http://www.ftdichip.com/Drivers/D2XX.htm).  Most accounts seem to indicate that more users have better luck with libftdi (which is available as a package for Ubuntu, for instance.) 
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**Build and install OpenOCD.  Download it from the downloads on our site, or from svn at the OpenOCD site. Then configure, make and make install.
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./configure --enable-ft2232_libftdi
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make
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make install
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Also, '''if you are using libftdi''', you may have to add the following line to your /etc/fstab:
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none /proc/bus/usb usbfs defaults,devmode=0666 0 0
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If you are using a parallel port Wiggler, you should read the literature and docs in the source, as they will guide you on what to do in terms of configuring before building.
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+
 
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*Configuring OpenOCD - Again, see [http://openfacts.berlios.de/index-en.phtml?title=OpenOCD_configuration Configuring OpenOCD] for details. Hints below.
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+
 
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*Available Commands in OpenOCD - Listed for reference.  While working in the telnet daemon window w/ OpenOCD, entering the command '''help''' will yield a list of available commands and summary of help. 
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> help
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                help    display this help
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                sleep    sleep for <n> milliseconds
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              version    show OpenOCD version
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            shutdown    shut the server down
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                exit    exit telnet session
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          log_output    redirect logging to <file> (default: stderr)
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          debug_level    adjust debug level <0-3>
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          jtag_speed    set jtag speed (if supported) <speed>
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          scan_chain    print current scan chain configuration
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            endstate    finish JTAG operations in <tap_state>
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          jtag_reset    toggle reset lines <trst> <srst>
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              runtest    move to Run-Test/Idle, and execute <num_cycles>
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            statemove    move to current endstate or [tap_state]
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              irscan    execute IR scan <device> <instr> [dev2] [instr2] ...
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              drscan    execute DR scan <device> <var> [ dev2 ]  [var2] ...
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    verify_ircapture    verify value captured during Capture-IR <enable|disable>
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                  var    allocate, display or delete variable <name> [num_fields|"del"] [size1] ...
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                field    display/modify variable field <var> <field> [value|"flip"]
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              script    execute commands from <file>
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                xsvf    run xsvf <file>
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              targets    no help available
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                flash    no help available
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              banks -    list configured flash banks
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              info -    print info about flash bank <num>
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              probe -    identify flash bank <num>
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        erase_check -    check erase state of sectors in flash bank <num>
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      protect_check -    check protection state of sectors in flash bank <num>
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              erase -    erase sectors at <bank> <first> <last>
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              write -    write binary <bank> <file> <offset>
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            protect -    set protection of sectors at <bank> <first> <last> <on|off>
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                nand    no help available
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                  pld    programmable logic device commands
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              arm7_9    arm7/9 specific commands
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        write_xpsr -    write program status register <value> <not cpsr|spsr>
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    write_xpsr_im8 -    write program status register <8bit immediate> <rotate> <not cpsr|spsr>
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    write_core_reg -    write core register <num> <mode> <value>
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          sw_bkpts -    support for software breakpoints <enable|disable>
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    force_hw_bkpts -    use hardware breakpoints for all breakpoints (disables sw breakpoint support) <enable|disable>
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              dbgrq -    use EmbeddedICE dbgrq instead of breakpoint for target halt requests <enable|disable>
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        fast_writes -    (deprecated, see: arm7_9 fast_memory_access)
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fast_memory_access -    use fast memory accesses instead of slower but potentially unsafe slow accesses <enable|disable>
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      dcc_downloads -    use DCC downloads for larger memory writes <enable|disable>
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          etb_dump -    dump current ETB content
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              armv4_5    armv4/5 specific commands
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                reg -    display ARM core registers
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        core_state -    display/change ARM core state <arm|thumb>
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        disassemble -    disassemble instructions <address> <count> ["thumb"]
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            arm9tdmi    arm9tdmi specific commands
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      vector_catch -    catch arm920t vectors ["all"|"none"|"<vec1 vec2 ...>"]
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            arm926ejs    arm926ejs specific commands
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              cp15 -    display/modify cp15 register <opcode_1> <opcode_2> <CRn> <CRm> [value]
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        cache_info -    display information about target caches
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          virt2phys -    translate va to pa <va>
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          mdw_phys -    display memory words <physical addr> [count]
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          mdh_phys -    display memory half-words <physical addr> [count]
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          mdb_phys -    display memory bytes <physical addr> [count]
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          mww_phys -    write memory word <physical addr> <value>
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          mwh_phys -    write memory half-word <physical addr> <value>
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          mwb_phys -    write memory byte <physical addr> <value>
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                  cfi    no help available
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                  reg    no help available
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                poll    poll target state
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            wait_halt    wait for target halt [time (s)]
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                halt    halt target
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              resume    resume target [addr]
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                step    step one instruction
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                reset    reset target [run|halt|init|run_and_halt|run_and_init]
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      soft_reset_halt    halt the target and do a soft reset
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                  mdw    display memory words <addr> [count]
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                  mdh    display memory half-words <addr> [count]
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                  mdb    display memory bytes <addr> [count]
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                  mww    write memory word <addr> <value>
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                  mwh    write memory half-word <addr> <value>
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                  mwb    write memory byte <addr> <value>
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                  bp    set breakpoint <address> <length> [hw]
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                  rbp    remove breakpoint <adress>
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                  wp    set watchpoint <address> <length> <r/w/a> [value] [mask]
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                  rwp    remove watchpoint <adress>
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          load_image    load_image <file> <address> ["bin"|"ihex"]
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          dump_image    dump_image <file> <address> <size>
+
          load_binary    [DEPRECATED] load_binary <file> <address>
+
          dump_binary    [DEPRECATED] dump_binary <file> <address> <size>
+
 
+
====Starting OpenOCD and Connecting with Telnet====
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You will need to do both of the following as root:
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*In a terminal window, cd to your OpenOCD config file and start it.  From this window you will see only diagnostic information, mainly. Change directory to the docs/configs in the openocd directory. Then start openocd, directing it to use the config file that you have set up previously.
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root@bitbaker-i686:/home/davygravy/Desktop/configs# openocd  -f lsp_wig.cfg
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Info:    openocd.c:86 main(): Open On-Chip Debugger (2007-04-26 16:40 CEST)
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Error:  embeddedice.c:190 embeddedice_build_reg_cache(): unknown EmbeddedICE version (comms ctrl: 0x00000018)
+
The error seems commonplace to most of us that have used it.  Until we know otherwise, most of us are assuming it is not a huge problem.
+
OpenOCD is now running.
+
 
+
 
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*In a second terminal window, start telnet pointed to loopback, port 4444.  This window is where you will control the communication and commands to your device via the jtag interface.  You will have to halt your processor, verify the flash banks, and probe them (so that they are recognized properly).
+
 
+
root@bitbaker-i686:/usr/src# telnet localhost 4444
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Trying 127.0.0.1...
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Connected to localhost.
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Escape character is '^]'.
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Open On-Chip Debugger
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> halt
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requesting target halt...
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> Target 0 halted
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target halted in ARM state due to debug request, current mode: Abort
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cpsr: 0x600000d7 pc: 0x00000028
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MMU: disabled, D-Cache: disabled, I-Cache: enabled
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> flash banks 
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#0: cfi at 0xfffc0000, size 0x00040000, buswidth 1, chipwidth 1
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> flash probe 0
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flash 'cfi' found at 0xfffc0000
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Once this is done, you have verified that you have proper access to the flash.  Now erase it, check your erase and then write the u-boot.bin file to flash.  This may take anywhere from about an hour up to 5 or 6 hours.  Do not interrupt the process.
+
 
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> flash erase 0 0 63
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erased sectors 0 through 63 on flash bank 0 in 4s 484466us
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> flash erase_check 0
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successfully checked erase state
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> flash write 0 /usr/src/openocd-package/doc/configs/lspstock052207.bin 0xfffc0000
+
wrote file /usr/src/openocd-package/doc/configs/lspstock052207.bin to flash bank 0 at offset 0xfffc0000 in 12107s 811284us
+
>
+
 
+
====Verifying Flash and Flashing====
+
To check to see if your flashing was successful (that the file you wanted to write to flash was actually written), dump it out and compared:
+
dump_image currentcontents.bin 0xfffc0000 0x40000
+
 
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diff currentcontents.bin lspstock052207.bin
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The second command should return nothing if the flash contents are identical to the image file.
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+
====Notes and Special Situations====
+
At least a handful of us have flashed once or twice, and then been able to proceed with a third flash.  Presumably, the processor was in a state that allowed us to do the first flash(es) but for some unknown reason comes to be in some less manageable state.  The difficulty for some of us has been getting the processor halted.
+
 
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Also, it is important to note that we are awaiting a possible (but not promised or guaranteed) version of OpenOCD that will work with the Feroceon processor that is in our ARM-based boxes.  The processor is not a true ARM926, so we can't count on everything on OpenOCD to work, until some changes are made.
+
  
 
===Terastation Pro v2/Terastation Live (arm9)===
 
===Terastation Pro v2/Terastation Live (arm9)===

Latest revision as of 13:07, 2 March 2008

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Contents

Introduction

TODO: Add generic info about JTAG and why it safes ones ass if he messes with the flash

Hardware

PPC-based-boxes

JTAG-cable from tampakuro/kuroguy

JTAG10-jtag-cable from http://www.soc-machines.com/

LS1

TODO: Add info about the additional Hardware mods needed to make JTAG working. Hint: bridge! + needed info about Flash structure

HG/HS

1) Installing headers TODO: what needs to be bridged?

Terastation

TODO: add specific Info if additional hardware mods are needed. + needed info about Flash structure

Terastation Pro v1

TODO: add specific Info if additional hardware mods are needed. + needed info about Flash structure

Mipsel-based boxes

TODO: Add info about the JTAG cable that works on the + needed info about Flash structure

LS2

Arm-based boxes

LS Pro and LS Live

See the article at JTAG & OpenOCD for the LS-Pro for complete details and instructions.

Terastation Pro v2/Terastation Live (arm9)

Similar to the other arm9-based boxes from buffalo these 2 only have uboot in flash. everything else is read and executed from harddisc.

Software

See JTAG Software

PPC-based-boxes

How to use the JTAG-Tools

TODO: we need to link + describe either how to compile the tools and how to use the precompiled tools from the download-section

LS2 (mipsel-based)

How to use HairyDairyMaids debrick

TODO: adding info about how to use it

TIPS

Flashing the bootloader only

Updating via JTAG is very slow. This is not really surprising as the JTAG protocol is a bit-level serial protocol. Writing the firmimg.bin file can easily take 24 hours or longer.

TODO: because we can flash the firmimg.bin much faster from UBoot

Link.png This article is currently a stub. You can help this Wiki by expanding it

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